Opamp Compensation

• Opamp
• Why compensation?
• how to start compensation for new designer?
• Compensation techniques...
• Important Links and Glossary.

Opamp:

Dont know why it is called Operational amplifier??? It is upto the reader to answer this question.

Opamp(Operational amplifier in short) realized with basic differential amplifier. Differential amplifier contains an gain transistors, load and tail current source. Basic differential amplifier is shown below:

Load can be resistance, diode connected mos, current source or any other combination of these.

Amplifier gain and bandwidth depends on what factors? 

What are the issues with the differential amplifier? Is the gain sufficient? If connected in closed loop does it operate correctly?

Lets assume that the opamp as a black box and has the following characteristics:

• Two inputs and one output.
• High input impedance.
• High Voltage Gain.
• Low output impedance.

Opamp input-output characteristics are defined by gain plot in dB and phase plot. Gain is Output voltage by input differential voltage. This plot is defined assuming Opamp operating in linear region i.e., output varies linearly with input.

Opamp most commonly used for signal conditioning, buffers, amplifiers etc. In most of these applications, the opamp is placed in negative feedback mode. what is negative feedback? Interms of voltage, if output voltage or part of output voltage is fedback and connected to the negative input of the opamp then its in negative feedback mode. Quite a few engineers end up in connecting the circuit wrongly and end up complaining that the Opamp is not working and output is always high or low. whenever we are using opamp in closed loop always check the opamp input output connections properly.

Now again we go to gain plot and phase plot. Gain plot means open loop gain of opamp across frequency. generally gain plot is in dB and typical gain of opamp at DC is 40dB(100) to 80dB(1000). gain plot generally rolls of at 20dB/dec from the 3dB bandwidth of the open loop gain, At Unity gain frequency Open loop gain falls to 0dB.

Add plot here

Few PLL Documents for freshers

• http://ece.wpi.edu/analog/resources/PLLTutorialISSCC2004.pdf

This document is by Dennis Fischette, which gives an overview of PLL and PLL internal blocks.
Basic circuits used and different architectures of each circuit.

• http://www.rfdh.com/ez/system/db/pds_tn/upload/57/PLL_performance,_simulation_and_design.pdf

Above book is by Dean Banerjee. This will explain PLL in terms of control system point of view. It explains about 2nd order PLL, 3rd order PLL etc. This will be helpful in building a matlab phase domain model for PLL.

Further notes on PLL will be added.

Intel developed 1-16Gbps Serdes in 14nm Intel process. They made it in tri-gate intel process. Anxious to listen what other companies are doing in 14nm process in serdes and high speed interface space.
Read eetimes link related to this.
http://www.eetimes.com/document.asp?doc_id=1321621

Few links related to high speed serdes and multi-protocol serdes
 https://www.semiwiki.com/forum/content/3240-does-multiprotocol-phy-ip-really-boost-ttm.html
https://www.semiwiki.com/forum/content/2168-rare-earth-syndrome-phy-ip-analogy.html

IP business: https://www.semiwiki.com/forum/content/2965-what%92s-new-%93interface-ip-survey%94.html

Semiwiki is a good website for IC Designers to learn what is going on in IC design world.